General description

When by using the ZX80, a processor was a NEC Zilog Z80-compatible, only this period of the slightly higher clock rate of Troika.Phoebe MHz. the body board experienced been redesigned using the custom-made-made chip & currently got simply tetrad chips: the Z80A microprocessor, a custom logic chip (Ferranti ULA) or ASIC, the 4118 1Kx8 bit RAM chip & the 2364 8Kx8 bit ROM chip. A body ROM had grown to 8 KB in size, and a BASIC now supported floating point arithmetic. In a early times, Sinclair offered the ROM as an update for the ZX80.

A base models when supplied (for even around £70 in the UK or $100 in the U.s.a.) got 1KB (1024 bytes) of RAM. This RAM was wont to hang on to a computer's models variables, a screen image, & any software download & information. A screen was text exclusively, 32 characters wide by Two dozen high. Yet blockish graphics sustaining the guide of 64 by 48 pixels were imaginable per have of the PLOT command, which ingeniously selected among the placed of Xvi graphics characters. To conserve memory, a screen bytes were stored when minimum length strings: e.g., in case the screen line wwhen just Xii characters hanker, it would become stored as merely victims Twelve characters followed per code for a up to date line, the rest of the line existence automatically assumed to become spaces. Applying this cognition, it was green to write computer program that saved to the top left of the screen to save memory. When a second memory-saving feature, BASIC keywords were stored when One-byte tokens. In case memory grew short, a total of lines displayed on the TV screen would exist as reduced.

Possibly by using a lot these space saving measures a little machine's memory did non last super far, therefore an expansion few was available using 16K of RAM ($100 in the U.s.a.). By mid-1982, 32K and 64K expansion packs were available. These plugged onto a independent card (& a 16K Memopak can be "stacked" by using a 16K or even 32K of these) & were ill-famed for wobbling & losing the effects of hours of programming. the printer was marketed to accompany the ZX81: This was a thermal printer in which the wire point sparked a dot pattern into Four-inch-wide silvery-silvery-gray thermal paper, accompanied by a distinct odor of ozone.

Notwithstanding, there were numerous games & applications that dog in the minimalistic I K, including the basic game of Chess. It was non that protective for to read, underst&, and control a computer wholly, something nearly impossible in todays world.

There were besides an RS-232 serial interface (at ~$140) and the Centronics parallel interface (at ~$105) that would allow the ZX81 to communicate to the standard printer, too as a good-sized external keyboard (at ~$85).

DK'tronics sold a case and keyboard which, with considerable skill, could be wont to replenish a membrane keyboard and black "doorstop" experience.

In a ZX80 & ZX81, the streaming video output was generated per Z80 chip. In a ZX80, once a program ran the screen blanked until the program paused once again for input. An improvement of a ZX81 across a ZX80 was that the ZX81 experienced deuce modes of operation. A ZX81 can start inside Convenient mode prefer a ZX80, blanking piece software online ran, or even inside SLOW mode (close to 1/4 when convenient) where a videos was maintained since computer program ran exclusively when a TV's negatron gun moved from either a bottom to the screen back to the top. Since a FOR-NEXT loop from either 1 to 1000 took Xix seconds, it was green to redo the machine inside Convenient day and night, possibly while editing a program, stimulating the TV to flash player each instance a key was pressed into the editor.

A second trait of a ZX81 was that it echoed a signal from either a tape machine to the screen when loading & saving computer software utilizing cassettes, stimulating the TV to display zigzagging system.

the ZX81 did non use a ability to produce healthy, however by clever disregard it was imaginable to modulate a interference that a processor driven on the TV & produce a Super elementary musical keyboard.

A ZX81 did non utilize ASCII but had its have character set. Character code Cipher was space, codes One-10 were utilized for blockish graphics, codes 11-63 corresponded to punctuation, counts & upper case characters. Character codes 128-191 were reverse video versions of the first 64 characters. More codes represented BASIC keywords & control codes like NEWLINE. There were there is no lower case characters.

Because a display was generated primarily by software system in the ZX81 ROM, it was possible to override a interrupt service routine and generate the display oneself. Many "hi-res" (meaning, 256x192, like than 64x48) games did this, notably from either the company known as Software Farm.

There was the ill-famed bug causing some ZX81s to give a square root of 0.Xxv when I.3591409 like than Cipher.Quintet. Sinclair's reputation for unfortunate quality control was due less to a existence of the bug inside a select few machines, & thomas more to the period it took to react it used to be that the bug got been reported. On the other h&, an article inside BYTE of the period, comparing mathematical accuracy of many mainstream and tremendously further expensive computers of the period, reflected positively on the ZX81.

A ZX81 sold inside prominent totals, until it was replaced by its greatly upgraded successor, a ZX Spectrum.

A Sinclair ZX81 was sold in the U.S. by Sinclair itself (from either its facility around Nashua, New Hampshire) and besides by Timex when a Timex-Sinclair TS1000. A TS1000 shipped by having twice as much RAM (Ii KB!)

ZX81 video technical operation

A technical indicator means utilized to implement a display, piece clever, was like thoroughly non-standard. A patterns operated when follows:

the ZX81 contains (dependant on RAM nature and severity) 4 chips; the RAM, a ROM, a CPU and an ASIC (called the ULA – Uncommitted Logic Array). The series of resistors were placed nonparallel by using a information lines; a CPU & ROM get on of these side of a information resistance, the RAM on the other. Addresses 0-8191 were allocated for ROM (a second half-kilobyte contained a electronic image images for the character placed) & 16384-32767 were allocated for RAM.

A display was interrupt-caused within such how else that normal processing can prove my point in a period of or even touching a vertical blanking interval; interrupts would so pass control to the cd routines in the period of the remainder of the available period. A CPU itself was so utilized as a counter to control a output of streaming video information from either memory to the TV screen.

A processor would attempt to go for it to an location of (32768 + a beginning of the videos information) within RAM. Location line A15 & an otherwise rarely-utilized Z80 control line which indicated "memory (instruction cycle) 1" would be at a same time active; a ULA would detect this as an attempt to execute from either either streaming memory & would latch a retrieved RAM information from the information bus. It would so prevent informatiin bit Sextet; whenever zero, it would inflict a NOP (there are no-operation) instruction (the lot zeroes on a Z80) onto the bus. the CPU would prove my point to execute cd RAM when in case it were Z80 machine language until it hit a byte using bit6 = I; this wouldn't exist as zeroed retired per ULA & would exist as executed commonly.

A ZX81 utilized its have non-standard character set inside which 0-63 were printable characters and 128-191 were a equivalent characters in reverse streaming videos. A sole valid byte by owning bit6 = One which can be written to streaming videos memory was 118, a Halting instruction. This wwhen utilized as a NEWLINE character.

Place any more byte sustaining bit6 = One (except Prevent) into the ZX81's video "display file" RAM& a machine would crash most instantly.

The non-maskable interrupt would then become utilized to bring a processor away from a Prevent state another period it was time to display a next raster line.

A conversion of the characters into pel for display was likewise according to exploitation of Z80-specific processor capabilities. the Z80 contained the register, R, which was commonly arranged to become a dynamic RAM refresh counter. When you took a period where information was non existence retrieved, a RFSH control signal would move & the R counter's contents would exist as output to the moo part of the location bus. An undocumented Z80 feature got a otherwise-unused interrupt vector register, I personally, on the upper part of the location bus when you took this refresh period.

A ZX81 got a bitmaps of a character set at a prevent of its 8K BASIC ROM; the ROM was wired to the paired side of location bus series resistors so that certain address bits can be overridden under ULA control. the I personally register would become loaded to point to a base of the character placed electronic image table within ROM & the R (refresh) counter can exist as utilized to count which line in the 8x8-bit electronic image for a character was to be displayed.

the BASIC interpreter itself was fully proprietary, unlike virtually all personal computer of this era (except a Apple) which utilized a series of similar however incompatible Microsoft BASIC variants. This intended that there was there is no require to comply using ASCII or any other existent standards.

Possibly a simplest Z80 instruction requires tetrad rounds to execute. When you took a number 1 period, a processor even would attempt to execute videos text when information; a ULA would latch a information & inflict a lot-zeroes (a NOP or there are no-operation instruction) onto a bus. In the period of a third period, the processor would attempt a moral force RAM refresh period. A ULA would utilize this refresh period to substitute bits 0-Five of the stored character in situ of location A3-8 of the location. A high bits would exist as from either a otherwise-unused interrupt vector register (which is pointing to a character set inside ROM), the moo tierce bits would suggest which row of the single character was presently existence looked. Informatiin bit Septenary from either the original character byte would become utilized internally by the ULA to control inverse-streaming videos on a per-character basis. In that manner, the byte of display pixels would become forced onto a bus in which it may so exist as fed into a shift register cautilized per equivalent crystal used to generate the CPU clock & from either there be sent to the TV placed.

A streaming sync would become generated using a equivalent personal I/O bit utilized to generate the output for the 250 bit/s cassette recorder interface.

Unluckily, a utilise of a CPU to generate a display would slow totally more processing by 75% whenever the display was enabled.

A I/O itself besides utilized a select few undocumented Z80 features. Nominally, the Z80 I/O larboard location is eight bits. In case a Ogdoad-bit register is utilized when the location (like Within The,[L]) what actually went out onto a Sixteen-bit Z80 location bus wwhen non L however Hectolitre, a Sixteen-bit pair by owning L as the moo eight bits. A ZX81 exploited this by using a upper eight bits of the location bus to cause the read lines for the 8x5 keyboard matrix. A returned bits may so become see by one input port.

A moo eight I/O location bits were utilized when single chip selects for personal I/O hardware in a ULA. Each moo location bit except that finding a desired device would so use at times to become 1, theoretically allowing for as much as eight I/O gear. In a standard configuration, the simply I/O present (unless the optional external thermal printer was plugged into the Xl-pin bus edge connexion) was a single bit for the cassette input, 1 bit for the cassette/cd sync output, a 5-bit word of input from either the keyboard (a dreadful Forty key device which resembled a car bumper sticker to a higher degree it resembled a proper computer keyboard) & whatever control registers were called upon to enable the ULA itself for video generation. This intended that non whole eight bits were utilized, permitting a few limited room for external expansion.

RAM wwhen originally limited to 2K (internal, Timex versions installed a fully Ii Kx8 RAM as One chip, more Sinclair ZX81s experienced One 1 Kx8 or even even 2 1 Kx4 electrostatic RAMs) or 16K (external, the RAMCS line on the Forty pin edge connective existence attached to a constant level in the RAMpack to disable the internal RAM) becahave of the use of M1 + A15 to show retrieval of streaming video character bytes.

the external RAMpack utilized eight 41Sixteen chips (the primitive Sixteen K ten Ace bit dynamic RAM around a 16-pin DIP with 1 information pin, Sevener multiplexed location diaper pins, /RAS, /CAS, /WE & power). These old chips involved +12 Five, +5 V & -5 V when a ZX81's internal power supply wwhen just the 7805 chip (the 5V linear regulator bound to the little metallic heatsink which became like warmly as the ZX81 was powered from either the Nina from carolina V adapter across a 1/8 inside (Deuce-ace millimeter) telephone jack). A RAMpack contained an oscillator & a few inductance to invert +5 V to a more involved voltages also when circuitry to multiplex the location lines, adding significantly to its internal complexness.

Alas a Forty pin bus edge connection itself was non gold-plated (the contacts were covered by owning evidently solder) & was super prone to bad modems and oxidation which rendered the upgraded ZX81 technique super mechanically fragile & crash-prone. This would be teasing when it would choose eight proceedings to reload a to the full 16Kbyte RAM from either an (typically-unreliable) cassette tape. Residence-brew "kludge" solutions to this condition varied from either physically bolting the computer & RAMpack to the firm substrate to placing the whole works around a big example using a proper spare keyboard in situ of the original.

A second less-most common update processed by a bit of prevent-users wwhen to attach electrostatic RAM (as "pseudo-ROM")in situ of the ROM mirrored at addresses 8192-16383. This RAM would require to become attached to the equivalent side of the information bus resistance when the ROM itself and so that it can be utilized to store a user-defined character placed of as much as 64 characters. Of these variant on this theme added a a single-bit latch to latch a high information bit of the original character (once M1 & A15 were two active) sequentially to let it run to cause one of the location bits, permitting tons 128 character bitmaps to exist as redefined.

When a main RAM was on a incorrectly side of the information & location bus resistance for this to operate, the more electrostatic RAM was involved for this approach. Loading a We register to point to a main RAM would non create the desired effect, instead displaying garbage when pel.